Embeetle, an IDE designed from scratch for embedded software developers.Name : nrf5340_application
description : nRF53 reference description for system-on-chip with dual ARM 32-bit Cortex-M33 microcontrollers
Architecture : (CM33)
revision : r0p4
endian : little
Memory Protection Unit (MPU) : available
Floating Point Unit (FPU) : available
Number of relevant bits in Interrupt priority : 3
name : CACHEDATA_S
description : CACHEDATA
base address : 0x0
name : CACHEINFO_S
description : CACHEINFO
base address : 0x0
name : CACHE_S
description : Cache
base address : 0x0
Interrupt (1) CACHE
name : CLOCK_NS
description : Clock management 0
base address : 0x0
Interrupt (5) CLOCK_POWER
name : CLOCK_S
description : Clock management 1
base address : 0x0
Interrupt (5) CLOCK_POWER
name : COMP_NS
description : Comparator 0
base address : 0x0
Interrupt (26) COMP_LPCOMP
name : COMP_S
description : Comparator 1
base address : 0x0
Interrupt (26) COMP_LPCOMP
name : CRYPTOCELL_S
description : ARM TrustZone CryptoCell register interface
base address : 0x0
Interrupt (68) CRYPTOCELL
name : CTI_S
description : Cross-Trigger Interface control. NOTE: this is not a separate peripheral, but describes CM33 functionality.
base address : 0x0
name : CTRLAP_NS
description : Control access port 0
base address : 0x0
name : CTRLAP_S
description : Control access port 1
base address : 0x0
name : DCNF_NS
description : Domain configuration management 0
base address : 0x0
name : DCNF_S
description : Domain configuration management 1
base address : 0x0
name : DPPIC_NS
description : Distributed programmable peripheral interconnect controller 0
base address : 0x0
name : DPPIC_S
description : Distributed programmable peripheral interconnect controller 1
base address : 0x0
name : EGU0_NS
description : Event generator unit 0
base address : 0x0
Interrupt (27) EGU0
name : EGU0_S
description : Event generator unit 1
base address : 0x0
Interrupt (27) EGU0
name : EGU1_NS
description : Event generator unit 2
base address : 0x0
Interrupt (28) EGU1
name : EGU1_S
description : Event generator unit 3
base address : 0x0
Interrupt (28) EGU1
name : EGU2_NS
description : Event generator unit 4
base address : 0x0
Interrupt (29) EGU2
name : EGU2_S
description : Event generator unit 5
base address : 0x0
Interrupt (29) EGU2
name : EGU3_NS
description : Event generator unit 6
base address : 0x0
Interrupt (30) EGU3
name : EGU3_S
description : Event generator unit 7
base address : 0x0
Interrupt (30) EGU3
name : EGU4_NS
description : Event generator unit 8
base address : 0x0
Interrupt (31) EGU4
name : EGU4_S
description : Event generator unit 9
base address : 0x0
Interrupt (31) EGU4
name : EGU5_NS
description : Event generator unit 10
base address : 0x0
Interrupt (32) EGU5
name : EGU5_S
description : Event generator unit 11
base address : 0x0
Interrupt (32) EGU5
name : FICR_S
description : Factory Information Configuration Registers
base address : 0x0
name : FPU_NS
description : FPU control peripheral 0
base address : 0x0
Interrupt (0) FPU
name : FPU_S
description : FPU control peripheral 1
base address : 0x0
Interrupt (0) FPU
name : GPIOTE0_S
description : GPIO Tasks and Events 0
base address : 0x0
Interrupt (13) GPIOTE0
name : GPIOTE1_NS
description : GPIO Tasks and Events 1
base address : 0x0
Interrupt (47) GPIOTE1
name : I2S0_NS
description : Inter-IC Sound 0
base address : 0x0
Interrupt (40) I2S0
name : I2S0_S
description : Inter-IC Sound 1
base address : 0x0
Interrupt (40) I2S0
name : IPC_NS
description : Interprocessor communication 0
base address : 0x0
Interrupt (42) IPC
name : IPC_S
description : Interprocessor communication 1
base address : 0x0
Interrupt (42) IPC
name : KMU_NS
description : Key management unit 0
base address : 0x0
Interrupt (57) KMU
name : KMU_S
description : Key management unit 1
base address : 0x0
Interrupt (57) KMU
name : LPCOMP_NS
description : Low-power comparator 0
base address : 0x0
Interrupt (26) COMP_LPCOMP
name : LPCOMP_S
description : Low-power comparator 1
base address : 0x0
Interrupt (26) COMP_LPCOMP
name : MUTEX_NS
description : MUTEX 0
base address : 0x0
name : MUTEX_S
description : MUTEX 1
base address : 0x0
name : NFCT_NS
description : NFC-A compatible radio 0
base address : 0x0
Interrupt (45) NFCT
name : NFCT_S
description : NFC-A compatible radio 1
base address : 0x0
Interrupt (45) NFCT
name : NVMC_NS
description : Non-volatile memory controller 0
base address : 0x0
name : NVMC_S
description : Non-volatile memory controller 1
base address : 0x0
name : OSCILLATORS_NS
description : Oscillator control 0
base address : 0x0
name : OSCILLATORS_S
description : Oscillator control 1
base address : 0x0
name : P0_NS
description : GPIO Port 0
base address : 0x0
name : P0_S
description : GPIO Port 2
base address : 0x0
name : P1_NS
description : GPIO Port 1
base address : 0x0
name : P1_S
description : GPIO Port 3
base address : 0x0
name : PDM0_NS
description : Pulse Density Modulation (Digital Microphone) Interface 0
base address : 0x0
Interrupt (38) PDM0
name : PDM0_S
description : Pulse Density Modulation (Digital Microphone) Interface 1
base address : 0x0
Interrupt (38) PDM0
name : POWER_NS
description : Power control 0
base address : 0x0
Interrupt (5) CLOCK_POWER
name : POWER_S
description : Power control 1
base address : 0x0
Interrupt (5) CLOCK_POWER
name : PWM0_NS
description : Pulse width modulation unit 0
base address : 0x0
Interrupt (33) PWM0
name : PWM0_S
description : Pulse width modulation unit 1
base address : 0x0
Interrupt (33) PWM0
name : PWM1_NS
description : Pulse width modulation unit 2
base address : 0x0
Interrupt (34) PWM1
name : PWM1_S
description : Pulse width modulation unit 3
base address : 0x0
Interrupt (34) PWM1
name : PWM2_NS
description : Pulse width modulation unit 4
base address : 0x0
Interrupt (35) PWM2
name : PWM2_S
description : Pulse width modulation unit 5
base address : 0x0
Interrupt (35) PWM2
name : PWM3_NS
description : Pulse width modulation unit 6
base address : 0x0
Interrupt (36) PWM3
name : PWM3_S
description : Pulse width modulation unit 7
base address : 0x0
Interrupt (36) PWM3
name : QDEC0_NS
description : Quadrature Decoder 0
base address : 0x0
Interrupt (51) QDEC0
name : QDEC0_S
description : Quadrature Decoder 1
base address : 0x0
Interrupt (51) QDEC0
name : QDEC1_NS
description : Quadrature Decoder 2
base address : 0x0
Interrupt (52) QDEC1
name : QDEC1_S
description : Quadrature Decoder 3
base address : 0x0
Interrupt (52) QDEC1
name : QSPI_NS
description : External flash interface 0
base address : 0x0
Interrupt (43) QSPI
name : QSPI_S
description : External flash interface 1
base address : 0x0
Interrupt (43) QSPI
name : REGULATORS_NS
description : Voltage regulators 0
base address : 0x0
name : REGULATORS_S
description : Voltage regulators 1
base address : 0x0
name : RESET_NS
description : Reset control 0
base address : 0x0
name : RESET_S
description : Reset control 1
base address : 0x0
name : RTC0_NS
description : Real-time counter 0
base address : 0x0
Interrupt (20) RTC0
name : RTC0_S
description : Real-time counter 1
base address : 0x0
Interrupt (20) RTC0
name : RTC1_NS
description : Real-time counter 2
base address : 0x0
Interrupt (21) RTC1
name : RTC1_S
description : Real-time counter 3
base address : 0x0
Interrupt (21) RTC1
name : SAADC_NS
description : Analog to Digital Converter 0
base address : 0x0
Interrupt (14) SAADC
name : SAADC_S
description : Analog to Digital Converter 1
base address : 0x0
Interrupt (14) SAADC
name : SPIM0_NS
description : Serial Peripheral Interface Master with EasyDMA 0
base address : 0x0
Interrupt (8) SERIAL0
Interrupt (8) SPIM0_SPIS0_TWIM0_TWIS0_UARTE0
name : SPIM0_S
description : Serial Peripheral Interface Master with EasyDMA 1
base address : 0x0
Interrupt (8) SERIAL0
Interrupt (8) SPIM0_SPIS0_TWIM0_TWIS0_UARTE0
name : SPIM1_NS
description : Serial Peripheral Interface Master with EasyDMA 2
base address : 0x0
Interrupt (9) SERIAL1
Interrupt (9) SPIM1_SPIS1_TWIM1_TWIS1_UARTE1
name : SPIM1_S
description : Serial Peripheral Interface Master with EasyDMA 3
base address : 0x0
Interrupt (9) SERIAL1
Interrupt (9) SPIM1_SPIS1_TWIM1_TWIS1_UARTE1
name : SPIM2_NS
description : Serial Peripheral Interface Master with EasyDMA 6
base address : 0x0
Interrupt (11) SERIAL2
Interrupt (11) SPIM2_SPIS2_TWIM2_TWIS2_UARTE2
name : SPIM2_S
description : Serial Peripheral Interface Master with EasyDMA 7
base address : 0x0
Interrupt (11) SERIAL2
Interrupt (11) SPIM2_SPIS2_TWIM2_TWIS2_UARTE2
name : SPIM3_NS
description : Serial Peripheral Interface Master with EasyDMA 8
base address : 0x0
Interrupt (12) SERIAL3
Interrupt (12) SPIM3_SPIS3_TWIM3_TWIS3_UARTE3
name : SPIM3_S
description : Serial Peripheral Interface Master with EasyDMA 9
base address : 0x0
Interrupt (12) SERIAL3
Interrupt (12) SPIM3_SPIS3_TWIM3_TWIS3_UARTE3
name : SPIM4_NS
description : Serial Peripheral Interface Master with EasyDMA 4
base address : 0x0
Interrupt (10) SPIM4
name : SPIM4_S
description : Serial Peripheral Interface Master with EasyDMA 5
base address : 0x0
Interrupt (10) SPIM4
name : SPIS0_NS
description : SPI Slave 0
base address : 0x0
Interrupt (8) SERIAL0
Interrupt (8) SPIM0_SPIS0_TWIM0_TWIS0_UARTE0
name : SPIS0_S
description : SPI Slave 1
base address : 0x0
Interrupt (8) SERIAL0
Interrupt (8) SPIM0_SPIS0_TWIM0_TWIS0_UARTE0
name : SPIS1_NS
description : SPI Slave 2
base address : 0x0
Interrupt (9) SERIAL1
Interrupt (9) SPIM1_SPIS1_TWIM1_TWIS1_UARTE1
name : SPIS1_S
description : SPI Slave 3
base address : 0x0
Interrupt (9) SERIAL1
Interrupt (9) SPIM1_SPIS1_TWIM1_TWIS1_UARTE1
name : SPIS2_NS
description : SPI Slave 4
base address : 0x0
Interrupt (11) SERIAL2
Interrupt (11) SPIM2_SPIS2_TWIM2_TWIS2_UARTE2
name : SPIS2_S
description : SPI Slave 5
base address : 0x0
Interrupt (11) SERIAL2
Interrupt (11) SPIM2_SPIS2_TWIM2_TWIS2_UARTE2
name : SPIS3_NS
description : SPI Slave 6
base address : 0x0
Interrupt (12) SERIAL3
Interrupt (12) SPIM3_SPIS3_TWIM3_TWIS3_UARTE3
name : SPIS3_S
description : SPI Slave 7
base address : 0x0
Interrupt (12) SERIAL3
Interrupt (12) SPIM3_SPIS3_TWIM3_TWIS3_UARTE3
name : SPU_S
description : System protection unit
base address : 0x0
Interrupt (3) SPU
name : TAD_S
description : Trace and debug control
base address : 0x0
name : TIMER0_NS
description : Timer/Counter 0
base address : 0x0
Interrupt (15) TIMER0
name : TIMER0_S
description : Timer/Counter 1
base address : 0x0
Interrupt (15) TIMER0
name : TIMER1_NS
description : Timer/Counter 2
base address : 0x0
Interrupt (16) TIMER1
name : TIMER1_S
description : Timer/Counter 3
base address : 0x0
Interrupt (16) TIMER1
name : TIMER2_NS
description : Timer/Counter 4
base address : 0x0
Interrupt (17) TIMER2
name : TIMER2_S
description : Timer/Counter 5
base address : 0x0
Interrupt (17) TIMER2
name : TWIM0_NS
description : I2C compatible Two-Wire Master Interface with EasyDMA 0
base address : 0x0
Interrupt (8) SERIAL0
Interrupt (8) SPIM0_SPIS0_TWIM0_TWIS0_UARTE0
name : TWIM0_S
description : I2C compatible Two-Wire Master Interface with EasyDMA 1
base address : 0x0
Interrupt (8) SERIAL0
Interrupt (8) SPIM0_SPIS0_TWIM0_TWIS0_UARTE0
name : TWIM1_NS
description : I2C compatible Two-Wire Master Interface with EasyDMA 2
base address : 0x0
Interrupt (9) SERIAL1
Interrupt (9) SPIM1_SPIS1_TWIM1_TWIS1_UARTE1
name : TWIM1_S
description : I2C compatible Two-Wire Master Interface with EasyDMA 3
base address : 0x0
Interrupt (9) SERIAL1
Interrupt (9) SPIM1_SPIS1_TWIM1_TWIS1_UARTE1
name : TWIM2_NS
description : I2C compatible Two-Wire Master Interface with EasyDMA 4
base address : 0x0
Interrupt (11) SERIAL2
Interrupt (11) SPIM2_SPIS2_TWIM2_TWIS2_UARTE2
name : TWIM2_S
description : I2C compatible Two-Wire Master Interface with EasyDMA 5
base address : 0x0
Interrupt (11) SERIAL2
Interrupt (11) SPIM2_SPIS2_TWIM2_TWIS2_UARTE2
name : TWIM3_NS
description : I2C compatible Two-Wire Master Interface with EasyDMA 6
base address : 0x0
Interrupt (12) SERIAL3
Interrupt (12) SPIM3_SPIS3_TWIM3_TWIS3_UARTE3
name : TWIM3_S
description : I2C compatible Two-Wire Master Interface with EasyDMA 7
base address : 0x0
Interrupt (12) SERIAL3
Interrupt (12) SPIM3_SPIS3_TWIM3_TWIS3_UARTE3
name : TWIS0_NS
description : I2C compatible Two-Wire Slave Interface with EasyDMA 0
base address : 0x0
Interrupt (8) SERIAL0
Interrupt (8) SPIM0_SPIS0_TWIM0_TWIS0_UARTE0
name : TWIS0_S
description : I2C compatible Two-Wire Slave Interface with EasyDMA 1
base address : 0x0
Interrupt (8) SERIAL0
Interrupt (8) SPIM0_SPIS0_TWIM0_TWIS0_UARTE0
name : TWIS1_NS
description : I2C compatible Two-Wire Slave Interface with EasyDMA 2
base address : 0x0
Interrupt (9) SERIAL1
Interrupt (9) SPIM1_SPIS1_TWIM1_TWIS1_UARTE1
name : TWIS1_S
description : I2C compatible Two-Wire Slave Interface with EasyDMA 3
base address : 0x0
Interrupt (9) SERIAL1
Interrupt (9) SPIM1_SPIS1_TWIM1_TWIS1_UARTE1
name : TWIS2_NS
description : I2C compatible Two-Wire Slave Interface with EasyDMA 4
base address : 0x0
Interrupt (11) SERIAL2
Interrupt (11) SPIM2_SPIS2_TWIM2_TWIS2_UARTE2
name : TWIS2_S
description : I2C compatible Two-Wire Slave Interface with EasyDMA 5
base address : 0x0
Interrupt (11) SERIAL2
Interrupt (11) SPIM2_SPIS2_TWIM2_TWIS2_UARTE2
name : TWIS3_NS
description : I2C compatible Two-Wire Slave Interface with EasyDMA 6
base address : 0x0
Interrupt (12) SERIAL3
Interrupt (12) SPIM3_SPIS3_TWIM3_TWIS3_UARTE3
name : TWIS3_S
description : I2C compatible Two-Wire Slave Interface with EasyDMA 7
base address : 0x0
Interrupt (12) SERIAL3
Interrupt (12) SPIM3_SPIS3_TWIM3_TWIS3_UARTE3
name : UARTE0_NS
description : UART with EasyDMA 0
base address : 0x0
Interrupt (8) SERIAL0
Interrupt (8) SPIM0_SPIS0_TWIM0_TWIS0_UARTE0
name : UARTE0_S
description : UART with EasyDMA 1
base address : 0x0
Interrupt (8) SERIAL0
Interrupt (8) SPIM0_SPIS0_TWIM0_TWIS0_UARTE0
name : UARTE1_NS
description : UART with EasyDMA 2
base address : 0x0
Interrupt (9) SERIAL1
Interrupt (9) SPIM1_SPIS1_TWIM1_TWIS1_UARTE1
name : UARTE1_S
description : UART with EasyDMA 3
base address : 0x0
Interrupt (9) SERIAL1
Interrupt (9) SPIM1_SPIS1_TWIM1_TWIS1_UARTE1
name : UARTE2_NS
description : UART with EasyDMA 4
base address : 0x0
Interrupt (11) SERIAL2
Interrupt (11) SPIM2_SPIS2_TWIM2_TWIS2_UARTE2
name : UARTE2_S
description : UART with EasyDMA 5
base address : 0x0
Interrupt (11) SERIAL2
Interrupt (11) SPIM2_SPIS2_TWIM2_TWIS2_UARTE2
name : UARTE3_NS
description : UART with EasyDMA 6
base address : 0x0
Interrupt (12) SERIAL3
Interrupt (12) SPIM3_SPIS3_TWIM3_TWIS3_UARTE3
name : UARTE3_S
description : UART with EasyDMA 7
base address : 0x0
Interrupt (12) SERIAL3
Interrupt (12) SPIM3_SPIS3_TWIM3_TWIS3_UARTE3
name : UICR_S
description : User Information Configuration Registers User information configuration registers
base address : 0x0
name : USBD_NS
description : Universal serial bus device 0
base address : 0x0
Interrupt (54) USBD
name : USBD_S
description : Universal serial bus device 1
base address : 0x0
Interrupt (54) USBD
name : USBREGULATOR_NS
description : USB Regulator 0
base address : 0x0
Interrupt (55) USBREGULATOR
name : USBREGULATOR_S
description : USB Regulator 1
base address : 0x0
Interrupt (55) USBREGULATOR
name : VMC_NS
description : Volatile Memory controller 0
base address : 0x0
name : VMC_S
description : Volatile Memory controller 1
base address : 0x0
name : WDT0_NS
description : Watchdog Timer 0
base address : 0x0
Interrupt (24) WDT0
name : WDT0_S
description : Watchdog Timer 1
base address : 0x0
Interrupt (24) WDT0
name : WDT1_NS
description : Watchdog Timer 2
base address : 0x0
Interrupt (25) WDT1
name : WDT1_S
description : Watchdog Timer 3
base address : 0x0
Interrupt (25) WDT1
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